SEMATECH News

2007 SEMATECH Knowledge Series Focuses on Lithography, Materials and Manufacturing

Austin, TX (29 January 2007) – Content for the 2007 SEMATECH Knowledge Series (SKS), a lineup of seminal public meetings on critical issues affecting the semiconductor industry, was announced today by SEMATECH President and CEO Michael R. Polcari.

This year’s SKS focuses on leading-edge trends in extreme ultraviolet lithography (EUVL), 193 nm immersion lithography (193i), materials to enhance transistor and back‑end development, and methods to improve manufacturing efficiency and yield. All are open to the public, with several accepting sponsorships and exhibits.

“SKS meetings are unique opportunities to focus on accelerating solutions for critical challenges in the nanoelectronics industry,” Polcari said. “The SKS meetings also reinforce SEMATECH’s long-held belief that collaboration is key to the continuous acceleration of technical knowledge that will keep our industry innovative and prosperous in the 21st century.”

The 2007 SKS meetings, grouped by technology focus, are listed below. Other meetings may be added during the remainder of the year.

Lithography Meetings

  • EUV Mask Carrier & Port Standards Workshop, Feb. 26 in San Jose, CA.  A half-day workshop offering experts an opportunity to review and improve the EUV mask carrier/handling and load port standard requirements needed for the SEMI specification document.
  • EUV Mask Blank Fiducial Standards for Defect Mitigation Standards Workshop,  March 1 in San Jose, CA.  This half-day workshop will help define and reach agreement on specifications for fiducially mark/ID pattern attributes for EUV mask blanks.
  • EUV Source Workshops, May 6 in Baltimore, MD, and Nov. 1 in  Sapporo, Japan. These workshops provide a review of critical challenges, performance updates, and technology developments related to EUV lithography sources.
  • SEMATECH Advanced Mask Cleaning Workshop, Sept. 17 in Monterey, CA. This workshop provides a forum for those concerned with advanced mask cleaning issues to share data, identify critical issues, and define potential cooperative projects.
  • 4th International Symposium on Immersion Lithography, Oct. 8-11 in Keystone, CO. Part of an ongoing series of immersion meetings, this symposium will continue to guide semiconduc­tor manufacturers and suppliers on progress in high-index 193i lithography, and build consensus on emerging critical issues. SEMATECH, in cooperation with IMEC and Selete, will host the 2007 Immersion Symposium.
  • 2007 International Symposium on Extreme Ultraviolet Lithography, Oct. 28-31 in Sapporo, Japan.  This meeting is part of SEMATECH’s commitment to help develop the technology and infrastruc­ture for EUV lithography – including sources, masks, optics, resists, contamination control, and metrology. EUVA and Selete, in cooperation with SEMATECH and the EUV CRC, will host the gathering.
  • EUV Mask Technology & Standards Workshop, Nov. 1 in Sapporo, Japan. This session offers experts an opportunity to provide direction on technical performance of EUV masks by identifying the latest performance data and potential issues, and to influence mask standards being adopted through SEMI Standards and the industry.

Materials Meetings

  • Surface Preparation and Cleaning Conference, April 24-26 in Austin, TX.  A conference for IC manufacturers, suppliers, and researchers to exchange and understand current developments regarding technologies and solutions for advanced wafer, mask cleaning, and surface preparation. The scope will encompass wafer front-end, wafer back-end, advanced mask, and environmental, safety and health issues in semiconductor cleaning.
  • International Symposium on Advanced Gate Stack Technology, Sept. 26-28 in Dallas, TX. Discussions will focus on current technical challenges for high-k/metal gate stack implementation for the 45 nm technology generation. This symposium will provide a rare opportunity for close interaction with leading experts in the field through topic sessions featuring invited and contributed talks, and a discussion panel of representatives from major semiconductor device makers and academia.
  • Alternate Channel Materials Workshop, December 2007, Washington, DC. The purpose of this workshop is to exchange ideas from experts and enhance potential collaboration among different institutions providing R&D directions on new channel materials and new device structures for future MOSFET technology. A precise date will be announced.

Manufacturing Meetings

  • AEC/APC Symposia - These ISMI-sponsored symposia, covering advanced equipment control and advanced process control (AEC/APC), are held three times a year to bring IC manufacturer and supplier experts together to accelerate the industry toward more efficient, intelligent manufacturing through automated, data-driven decision-making.
    • 8th AEC/APC European Conference, April 18-20, Dresden, Germany
    • 2007 AEC/APC Symposium XIX North America, Sept. 15-19, Indian Wells, CA
    • 5th AEC/APC Symposium-Asia, Nov. 29-30, Tokyo, Japan
  • 2007 ISMI Technical Seminar, Japan. This industry workshop will provide regional experts with insight into semiconductor manu­facturing challenges, review ISMI program activities and position papers, and update IC manufacturer requirements and industry standardization activities. This seminar also includes a half-day briefing for ISMI member company technologists on the most recent technical developments from ISMI’s projects. Date and location will be announced later this year.
  • 4th ISMI Symposium on Manufacturing Effectiveness, Oct. 22-25 in Austin, TX. This annual symposium hosted by ISMI is focused on reducing manufacturing costs and increasing productivity through advances in equipment, fab design, and manufacturing methods, both in existing fabs and next-generation factories. The symposium includes keynote speakers, panel discussion, poster sessions, and breakout sessions for industry technologist involved in equipment productivity, fab productivity, fab design, statistical methods, e-manufacturing, design for ESH, and yield/metrology.

International Technology Roadmap for Semiconductors (ITRS) Conferences

  • Spring Conference, April 25 in Annecy, France
  • Summer Conference, July 18 in San Francisco, CA
  • Winter Conference, Dec. 5 in Tokyo, Japan

At these seasonal meetings, teams of industry and research experts update and revise the ITRS, an influential R&D guide for the industry. Participants see the latest Roadmap and provide input to the technology working group teams. SEMATECH hosts the summer conference and encourages attendees from the manufacturing and supplier community to participate personally in building the next ITRS.