SEMATECH News
Unveiling New Business Model, SEMATECH Offers Program-based Memberships in 3D
Austin, TX (21 March 2007) – SEMATECH, the world’s leading nanoelectronics consortium, is opening membership in its 3D Interconnect Program to suppliers, chip-makers, assembly and packaging companies and other participants in the semiconductor industry, officials said today.
SEMATECH’s invitation is the first of several planned opportunities for chip‑related companies to join SEMATECH at the program level, where they can participate in leading-edge R&D in specific technologies. Such new partners will help drive the roadmaps, projects and R&D products of their chosen programs.
President and CEO Michael R. Polcari said SEMATECH’s expanded membership strategy provides more flexibility and reflects a growing need for more chip industry entities to collaborate in targeted areas of basic, precompetitive R&D.
“SEMATECH has long been an important resource for the world’s leading chip-makers to share in the costs, benefits, and IP of precompetitive, advanced technology research,” said Polcari. “As a result of demand in the marketplace, we’ve decided to open specific areas of SEMATECH to companies — suppliers, manufacturers, specialty groups all across our industry — interested in program-based membership. The members of these programs will partner with us to drive and influence developments across the entire technology value chain.”
Using deep through-silicon vias to electrically connect a stack of chips, 3D interconnect technology bonds semiconductor wafers and dies to produce multilevel microchips with an optimum combination of cost, functionality, performance and power consumption. When proven feasible for volume manufacturing, 3D will provide a path toward integrating diverse CMOS technologies to each other, as well as CMOS chips with emerging technologies such as MEMS and bio-chips in a cost-effective manner.
SEMATECH launched its 3D Program in early 2005 to investigate technology options. As part of that work, a comprehensive cost-model has been developed, a 3D roadmap has been drafted for the International Technology Roadmap for Semiconductors (ITRS), and tool and process benchmarking has begun. Future work will focus on development of 3D infrastructure, materials, unit processes, integration, and reliability, said Sitaram Arkalgud, director of SEMATECH’s Interconnect Division.
“3D is a critical program for the semiconductor industry, and we’re building the critical mass to help drive it. 3D offers a way to achieve high density and performance while also being able to integrate non-CMOS products with CMOS. Realizing its full potential requires the participation of several areas of the industry including design, test, materials, front end wafer processing, and back-end assembly,” Arkalgud said. “As a result, we are taking an inter-disciplinary approach, and looking for inputs from as many participants as possible.”
SEMATECH was formed 20 years ago as a consortium of chip-makers, and has since become a key R&D resource for the global chip industry. In response to industry demand, SEMATECH in January 2004 formed a subsidiary consortium – International SEMATECH Manufacturing Initiative (ISMI) – to serve companies primarily interested in manufacturing productivity and cost reduction.
In mid-2004, SEMATECH made its R&D wafer fab available to the industry by launching ATDF as a subsidiary. Today ATDF serves a wide variety of customers through its emerging technology and wafer services programs.
“The new program-based membership model represents a natural evolution of these trends and responds to industry demands for another option in SEMATECH’s long history of offering flexible participation in our family of companies,” said Polcari.
For more information about SEMATECH's 3D Program, see www.sematech.org/research/3D.
