SEMATECH News
III-V Compounds Emerging as Prime Materials for Future NMOS Channels, Technologists Indicate at SEMATECH & AIXTRON Workshop
Washington, DC (18 December 2007) – The high electron mobilities of selected III-V compounds make them prime candidates for future NMOS channel materials, with an indium-based gallium-arsenide (InGaAs) likely to be the material of choice, industry experts agreed during a SEMATECH-led workshop at the IEEE International Electron Devices Meeting (IEDM).
The invitational meeting, sponsored by AIXTRON AG and organized by SEMATECH, attracted more than 60 industry and university scientists to presentations from ranking technologists. The proponents of III-V expressed considerable excitement over the manufacturability of materials based on previously underused elements in columns III-V of the periodic table. InGaAs, with a mobility performance of 6-10 times that of silicon (Si), emerged as a leading channel material for dual channel devices that may consist of germanium-based PMOS and III-V-based NMOS field-effect transistors (FETs.)
At the same time, several industry experts expressed concern that these materials-based solutions for performance enhancement could not be brought to manufacturing in time, and that many issues that need to be addressed to realize performance improvement would not be resolved in time for devices at 22nm and beyond .
Technologists also agreed that inserting III-V materials on Si devices poses several challenges, including lattice mismatch, poor interface quality, high-k dielectric growth and off-state current leakage. However, the scalability of metal-organic chemical vapor deposition (MOCVD) attracted a consensus as the most promising manufacturing process, with clustered chambers for III-V and high-k suggested as an effective tool configuration for increased throughput. Opening speaker Robert Chau of Intel urged researchers to collaborate on resolving these and other issues, adding: “By 2012, we should have a real working solution for III-V.”
The workshop, “III-V CMOS on Si: Technical and Manufacturing Needs,” also included a welcome speech by Raj Jammy, director of SEMATECH’s Front End Processes Division. The speakers panel consisted of Devendra Sadana of IBM, Max Fischetti of the University of Massachusetts, Suman Datta of Penn State University, Gene Fitzgerald of MIT, Matthias Passlack of Freescale Semiconductor, Peter Ye of Purdue University, and Rainer Beccard of AIXTRON. The workshop was moderated by Rusty Harris and Prashant Majhi of SEMATECH and by Zia Karim from AIXTRON.