SEMATECH DOC ID #: 99063760B-TR

Title: Guide for the Design of Semiconductor Equipment to Meet Voltage Sag Immunity Standards

Author(s): Dennis Johnson;Jim Ammenheuser;John Soward;Mark Stephens;

Document date: 12/13/1999

Descriptor(s): equipment performance;equipment reliability;standards;power supply;

Abstract:  This document summarizes the finding of testing to determine the immunity of
semiconductor equipment to voltage sag events. Based in part on the findings,
global standards have been adopted to define voltage sag immunity
requirements for semiconductor equipment. As shown by the research, effective
power conditioning and embedded design solutions can significantly improve
the ability of equipment to ride through typical voltage sag events. The
report conveys the basic findings of the research with regard to test
results, standards development, and effective mitigation solutions. This
document version contains corrected references to EPRI PEAC Corp.

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