SEMATECH Dictionary of Semiconductor Terms

A-Am | An-Az | B | C-Ch | Ci-Com | Con-Cz | D-De | Df-Dz | E-En | Eo-Ez | F-Fl
Fm-Fz | G | H | I | J-K | L | M-Mes | Met-Mz | N | O | P-Ph | Pi-Pq | Pr-Pz | Q | R
S-Se | Sh-So | Sp-Sta | Ste-Sz | T-Th | Ti-Tz | U-V | W-Z

"L"

label n		a piece of paper or other material affixed to a container or article, on which is printed information concerning the product or addresses. It may also be printed directly on the container. [ASTM D996-90]
lamella n		a special type of twin. A lamella is a multiple twin that is extremely thin and relatively long, and that may intersect more than one plane. [SEMI M10-89] Also see crystal lattice.
laminar air flow n		a flow of air uniformly parallel from ceiling to floor, or wall to wall in a room or workstation, moving with uniform velocity and a minimum of turbulence. [SEMATECH]
land-grid array		see ball grid array.
landing pad n		contact metal pads on a wafer usually associated with test probes and existing for test only. [1994 National Technology Roadmap for Semiconductors]
lapping		see backgrind.
large scale integration (LSI) n		the placement of between 100 and 1000 active devices on a single die. [SEMATECH]
laser-scattering light event n		a signal pulse that exceeds a preset threshold, generated by the interaction of a laser beam with a localized light scatterer (LLS) at a wafer surface as sensed by a detector. [ASTM F1241] Also see haze.
latch cavities n		spaces located in the port assembly guide rails that accommodate the box latches in the open position of the box door. [SEMI E19-91]
latch pins n		for wafers less than or equal to 150 mm and for wafers equal to 200 mm, pins that engage the box latches and accomplish the lock/unlock functions. Latch pins are on the port plate. [SEMI E19.4-94]
latent image n		a condition produced and persisting in the image receptor by exposure to radiation that is able to be converted into a visible image by processing. [ASTM E586 REV A-90]
lateral diffusion n		diffusion parallel to the wafer surface. Lateral diffusion of metal-oxide semiconductor source/drain regions determines the effective channel length of the device. [SEMATECH]
lateral straggle n		the motion of ions parallel to the wafer surface as a result of ion implantation. [SEMATECH]
latex sphere equivalent (LSE) n		the diameter of a monodisperse polystyrene latex sphere that produces the same detected scattering intensity as the localized light scatterer (LLS) under investigation under identical test conditions. [SEMATECH].
latent scratch n		in flat panel display substrates, a scratch that is usually invisible but that becomes visible when surface glass is removed by dipping into a detergent or a corrosive solution, such as an acid. [Adapted from SEMI D9-94]
lay n		1 : the general direction of orientation of major surface features. [SEMATECH] 2 n : of a wafer surface, the predominant direction of the surface texture. [ASTM F1241]
layer n		on a cofired ceramic package, the body is made from layers of ceramic or metallized ceramic. The layers are defined by their functionality, and several ceramic layers may be described as comprising one functional layer if all are common in plan-form and function (for example, die attach cavity). [SEMI G61-94] Also see ceramic chip carrier.
layer of polycrystalline silicon n		in dielectrically isolated (DI) wafers, the thick matrix material of a DI wafer in which the silicon tubs reside. [SEMI M22-92]
layout n		1 : the physical geometry of a circuit or die. [1994 National Technology Roadmap for Semiconductors] 2 : the process of creating the physical geometry of a circuit or die. [1994 National Technology Roadmap for Semiconductors] 3 : see composite drawing.
L-bar n		a test structure on a photomask in which the circuit feature or "line" is oriented in both the horizontal and vertical directions relative to the orthogonal axis of the exposure field of a stepper. The two lines are are oriented 905 to one another and joined at the corners to form an L-bar target. The combination of line sizes is used to test the imaging characteristics of a stepper. [SEMATECH]
LDD		see lightly doped drain.
LDL		see lower detectable limit.
lead		see external lead and bond finger.
lead bend angle n		in the manufacture of molded plastic packages, the angle to which the leads are bent in reference to a plane normal to the X-Y plane of the package. [Adapted from SEMI G54-93]
lead coplanarity n		in the manufacture of molded plastic packages, the vertical position of a lead foot with respect to a reference plane that is created by the three leads with feet most extended from the bottom surface of the package body. [Adapted from SEMI G54-93]
lead cut-off notch n		the shaping of the tip of the external lead where it joins the leadframe rail so the rail may be easily broken away during trimming and so the lead may easily be inserted into the through-hole of a printed circuit board during board assembly. [SEMATECH]
lead flat surface n		1 : on a stamped leadframe, the area on the internal lead tips that is suitable for wire bonding. Suitability for wire bonding is typically achieved by coining the surface. [SEMI G9-89] 2 : of a nominal leadframe bond finger, the area that is suitable for wire bonding. This area may be specified as a percentage of the nominal finger width (usually 80%) for a specified length for both stamped and etched leadframes, or by the width and length of a coined area in stamped leadframes. In ceramic packages, the effective area of a bond finger is specified as a void-free area within the confines of the nominal finger area. [SEMATECH] Also called effective wire bond area and minimum flat wire bonding area.
leadframe n		sheet metal framework upon which an integrated circuit is attached, wirebonded, and transfer molded with epoxy. [SEMATECH]
lead location or position, variations in n		in a semiconductor package, external lead tip or foot position variations in the X and Y directions with reference to a 905 angle drawn from the top or bottom surfaces of the package when viewed from the end or side projections. The middle of the lead tip or foot is the point of measurement. [SEMATECH]
lead lock n		in metal leadframes for plastic packages, the notches and cut-outs designed into the internal sections of the leads. These features hold the leads firmly in the plastic and resist lead pull-out. [SEMATECH] Also see lead lock groove.
lead lock groove n		in etched metal leadframes for plastic packages, a groove etched into the leads or die support bars of an etched leadframe in order to improve pull-out resistance of the lead or bar after it is molded into a plastic body. The depth of the groove is roughly half the leadframe thickness. [SEMATECH] Also see lead lock.
lead offset n		1 : in brazed ceramic packages, the variation in position of the center line of the lead with reference to the center line of the braze pad to which it is mounted. [SEMI G61-94] Contrast side-to-side misalignment and lead-to-lead misalignment.
lead shoulder n		the section of an external lead between the dambar and a plastic package body or the similar lead area in cerdip packages. In some cases, this lead section may be wider than the section of the lead that makes contact to external circuitry or sockets. [SEMATECH]
lead shoulder protrusions or intrusions n		in the manufacture of a plastic semiconductor package, variations in straightness along the defined shoulder, caused essentially by dambar removal. [SEMI G36-88]
lead sweep n		lead movement, measured with respect to a datum, perpendicular to the top or bottom surfaces of a package that passes through the designed midpoint of the lead where the lead is attached to the package (for example, sidebrazed laminates) or where the lead exits the package body (for example, plastic dual inline packages). The movement is viewed from the side of the package, not the ends. [SEMATECH] Contrast lead-to-lead misalignment.
lead-to-lead misalignment n		the allowable variation in the position of leads on, for example, sidebrazed laminates, or the allowable variation in the position of pins on, for example, a pin grid array, with respect to each other and to the nominal designed separation. [SEMATECH] Contrast lead sweep.
lead-to-lead separation n		in cofired ceramic packages, the distance between adjacent leads when measured from their center lines at the point of connection to the package. [SEMI G61-94]
lead tweeze		see lead sweep.
lead twist		see twist.
leak n		in the measurement of mass flow controller leak rates, a path or paths in a sealed system that will pass helium when a partial pressure differential exists. A partial pressure differential can exist for helium even though a total gas pressure differential may not exist. A leak may be a mechanical leak or a permeation leak, or it may have both mechanisms operating in parallel. [Adapted from SEMI E16-90]
leakage, inboard n		lleakage from outside to inside that occurs when the internal pressure is less than the external pressure acting on a component. [SEMI F1-90]
leakage, internal n		leakage that occurs within a component across a flow barrier, such as leakage across the seat of a closed valve. [SEMI F1-90]
leakage, outboard n		leakage from inside to outside that occurs when the internal pressure is greater than the external pressure acting on a component. [SEMI F1-90]
legacy system n		already existing (and perhaps outdated) installed system. Because of their rigidity in the presence of rapidly changing business requirements, legacy systems may constrain business strategy and corporate competitive response. [SEMATECH]
length byte n		the character used to establish the block length during transmission. [SEMI E4-91]
level of concern (LOC) n		a quantity equal to 0.1 of the immediately dangerous to life and health (IDLH) value. [SEMI F6-92]
Level 1 qualification n		the first level of qualification in the SEMATECH qualification methodology for semiconductor manufacturing equipment. Level 1 qualification uses short-flow processing. [SEMATECH] Also see Level 2 qualification.
Level 2 qualification n		the second, more intensive level of qualification in the SEMATECH qualification methodology for semiconductor manufacturing equipment. Level 2 qualification involves integration in full-flow processes. [SEMATECH] Also see Level 1 qualification.
levels of evaluation n		refers to four levels of instructional evaluation designed to determine the effectiveness of education and training: level 1 measures participant satisfaction at the completion of a class; level 2 measures participant performance during and/or at the end of the class; level 3 measures the degree of applicability on the job of what's been learned by participants 3-6 months after the class; and level 4 measures the value of instruction or return on investment. [SEMATECH]
life cycle n		the stages beginning with original requirements specifications and ending with the final retirement of a program, application, or tool. [SEMATECH]
lifetime		see minority carrier lifetime.
lift access n		in quartz and high temperature carriers, the clearance space in which an implement is inserted to pick up a wafer carrier. [SEMI E2-93]
lift access height n		in quartz and high-temperature wafer carriers, the distance from the horizontal center line of the lift access opening to the bottom plane. [SEMI E2-93]
lift access opening n		in quartz and high-temperature wafer carriers, the size of the opening provided for the insertion of an implement that picks up the wafer carrier. [SEMI E2-93]
lift access spacing n		in quartz and high-temperature wafer carriers, the distance from center line to center line of the lift access opening. [SEMI E2-93]
lightly doped drain (LDD) n		a metal-oxide semiconductor (MOS) device design in which the drain doping is reduced to improve breakdown voltage. [SEMATECH]
light point defect (LPD)		see localized light scatterer.
lineage n		a low-angle grain boundary resulting from an array of dislocations. [ASTM F1241]
linearity n		in the linearity of mass flow devices, the closeness to which a curve approximates a straight line. It is measured as a nonlinearity and expressed as a linearity. [SEMI E27-92]
line character misalignment n		in the serial alphanumeric marking of semiconductor wafers, the vertical distance (R) between the character baselines of two characters on the same line. [SEMI M12-92]
line control n		a portion of the block transfer protocol. NOTE-Line control establishes direction of message transmission, resolves contention (both ends of the line attempting to send communications concurrently), and resolves retries. [SEMI E4-91]
		line defect see dislocation.
line focus n		in the measurement of photolithographic instruments, the Z-axis position at which, for evaluative lines in the image, the optical image has the highest contrast, and at which the evaluative line pattern will consequently appear with the correct width and pitch. Line focus may vary across the image field and is properly given as a Z-axis value for a specified image site in the image field. It also varies with the line angle, and the line focus must therefore include a specification of the angle, such as sagittal, tangential, or some other angle. [Adapted from SEMI P25-94]
line spacing misalignment n		in the serial alphanumeric marking of silicon wafers, the vertical distance between the character baselines of two characters on the same line. [SEMI M13-88] Also see adjacent character misalignment.
linewidth n		1 : in semiconductor technology, the distance between the air-line material boundaries at some specified height above the interface between the patterned layer in which the line is formed and the underlying layer. [SEMI P19-92] 2 : a measurement with which to determine critical dimensions. [SEMATECH]
linewidth, etched n		a measurement of the etched feature produced on a wafer by transfer of the resist pattern into the wafer. [SEMATECH] Also called final inspect (F/I) and post etch.
linewidth, PR n		a measurement of the resist feature produced on a wafer during photo processing after the develop process. [SEMATECH] Also called develop/inspect (D/I) and pre-etch.
liquefied compressed gas n		a gas that, under the charged pressure, is partially liquid at a temperature of 21.1 degrees C (70 degrees F). [SEMI C3-94]
list n		an ordered set of elements; a group of item. Note-An element can be either an item (a data element within a message) or a list. The list structure allows the grouping of items of related information that may have different formats into a useful structure. [SEMI E5-92]
lithography n		a process in which a masked pattern is projected onto a photosensitive coating that covers a substrate. [SEMATECH] Also called photolithography. Also see electron beam lithography.
LLS		see localized light scatterer.
load v		to place a cassette on the cassette stage of the equipment. [SEMI E23-91] Contrast unload.
load depth n		the horizontal distance from the load face plane to cassette centroid or container centroid. [SEMI E15-91]
load face plane n		the furthest physical vertical boundary plane from cassette centroid or container centroid on the side (or sides) where loading of the tool is intended. [SEMI E15-91]
load height n		the distance from the bottom of the cassette or container to the floor on which the tool is installed. [SEMI E15-91]
load lock n		an isolation chamber through which wafers are inserted into a process tool. [SEMATECH]
LOC		see level of concern.
local clearance n		the distance between the external surface of a cassette or container to nearby vertical obstructions such as an alignment pocket. [SEMI E15-91]
localized light scatterer (LLS) n		an isolated feature, such as a particle or pit, on or in a wafer surface, resulting in increased light scattering intensity relative to that of the surrounding wafer surface. [ASTM F1241] Also called light point defect. Contrast point defect.
local matter n		a decision made by a system concerning its behavior in the SECS Message Specification that is not subject to the requirements of this standard. [SEMI E13-91]
logic n		a collection of circuit elements that perform a function, especially a set of elements that use digital logic and perform Boolean logic functions. [1994 National Technology Roadmap for Semiconductors]
logic design n		techniques used to connect logic building blocks or primitives (that is, AND gates, OR gates, etc.) to perform a logical operation (that is, arithmetic.). [1994 National Technology Roadmap for Semiconductors]
long radius elbow n		in equipment exhaust systems, an exhaust duct elbow that has a center line radius 1.5 or more times the duct diameter. [SEMI S6-93]
long term capability n		the process capability under normal operating conditions over an extended period. [EIA 557]
long wavelength cutoff n		1 : in characterizing surface roughness by noncontact optical profilometry, the longest spatial wavelength at which the measurement device will measure 50% of the true amplitude of a sinusoidal surface feature. [SEMATECH] 2 : in the roughness measurement of flat panel display substrate surfaces, a wavelength for which the amplitude's attenuation ratio becomes 75% when the traced profile is passed through the high-pass wavelength filter which eliminates waviness element. [Adapted from SEMI D7-94]
long-wire pitch n		the sum of the line width and spacing for conductors that traverse die on the upper levels of interconnect to connect blocks of functional structures on integrated circuits. [1994 National Technology Roadmap for Semiconductors]
lot n		1 : a batch of wafers processed at the same time. [SEMATECH] 2 : all the wafers or substrates of identical size and characteristics contained in a single shipment. [SEMATECH] 3 : subdivisions of those wafers or substrates contained in large shipments that have been identified by the supplier as constituting a lot. [SEMI M1-94]
lower detectable limit (LDL) n		in an instrument, the lowest concentration of a substance that will initiate a response with a signal-to-noise ratio of at least 3 dB. [SEMI F6-92]
lower range input value n		in mass flow devices, the lowest value of input at which the device is specified to operate. In mass flow controllers, this is zero or the lowest set point at which the instrument is specified. In mass flow meters, this is either no flow or the lowest actual flow value at which the instrument is specified. [SEMI E27-92]
low pressure isolation (LPI) valve n		a shutoff valve located on the low pressure side of a gas system that, when closed, isolates the purged volume from the distribution piping and all other downstream components. [SEMI F13-93]
low pressure side n		that part of a piping system exposed to the pressure of a gas that has been reduced below cylinder pressure when passed through a pressure regulator. The low pressure side includes the outlet chamber and diaphragm of the pressure regulator as well as the delivery pressure gauge. The term "low pressure" in this instance does not imply a particular value of pressure. [SEMI Chemicals/Gases, Vol. 1, 1990 (no longer in print)]
low pressure vent (LPV) valve n		a shutoff valve located on the low pressure side of a gas system to control the release of gas from the system. [SEMI Chemicals/Gases, Vol. 1, 1990 (no longer in print)]
low surface tension fluid n		liquid with a surface tension less than 30 dynes per centimeter. [SEMATECH]
low voltage		see National Electric Code (NEC) low voltage.
LPD		abbreviation for light point defect. See localized light scatterer.
LSE		see latex sphere equivalent.
LSI		see large scale integration.

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