SEMATECH Dictionary of Semiconductor Terms

A-Am | An-Az | B | C-Ch | Ci-Com | Con-Cz | D-De | Df-Dz | E-En | Eo-Ez | F-Fl
Fm-Fz | G | H | I | J-K | L | M-Mes | Met-Mz | N | O | P-Ph | Pi-Pq | Pr-Pz | Q | R
S-Se | Sh-So | Sp-Sta | Ste-Sz | T-Th | Ti-Tz | U-V | W-Z

"P-Ph"

package n		a container for a die (often plastic or ceramic) that provides protection and connection to the next higher level of integration. [SEMATECH]
package warpage n		the loss of planarity of a plastic molded surface, excluding protrusions and intrusions. In semiconductor packages, warpage is measured by the warp factor. [SEMI G54-93]
packed valve n		a shutoff or metering type of valve designed to prevent the gas it controls from escaping to the atmosphere. The escape of gas is prevented by means of a stem that rotates or moves within its seal material during actuation. The dynamic seal interface separates the medium from the atmosphere. [SEMI International Standards 1990, Vol. 1, Glossary]
packet n		a physical division of a message used by the message-transfer protocol. NOTE-Each packet contains data and control information. [SEMI E5-92] Also see message protocol.
packless valve n		a shutoff or metering valve designed to prevent escape of the gas by a static seal, such as a diaphragm or bellows, that isolates the controlled gas from the atmosphere. [SEMI International Standards 1990, Vol. 1, Glossary]
pad		see bonding pads.
pad-array carrier		see ball grid array.
paddle n		1 : a silicon carbide structure on a diffusion furnace that supports a sled. [SEMATECH] 2 : in cluster tools, a blade transport module end effector designed to support the wafer. [SEMI E22-91]
pad-grid array		see ball grid array.
pad ox		see pad oxide.
pad oxide n		a thin, thermally grown oxide that separates adjacent layers (one typically being silicon nitride) on a silicon wafer. [SEMATECH] Also called pad ox.
PAL		see programmable array logic.
panel n		an area of a safety sign having a distinctive background color that is different from other areas, or that is clearly delineated by a line border or margin. There may be up to three panels per sign, key word, message, and symbol panels. [SEMI S1-90]
parallelism tolerance n		in plastic and metal wafer carriers, the minimum and maximum dimension allowance for the opposite sides of the pockets of a wafer carrier to vary in relation to their distance from the crossbar end of the wafer carrier. [SEMI E1-86]
parametric test n		wafer-level testing of discrete devices such as transistors and resistors. [SEMATECH]
parasitics n		unwanted circuit components (for example, capacitors or resistors) present in a design. [1994 National Technology Roadmap for Semiconductors]
parathesia n		a sensation of prickling, tingling, or creeping on the skin for which there is no objective cause. [SEMATECH]
parent n		in object-oriented programming systems, a level that precedes another level within the model hierarchy. [SEMATECH] Also see inheritance.
Pareto analysis n		a problem-solving technique in which all potential problem areas or sources of variation are ranked according to contribution. [EIA 557]
parser n		a program used to determine the syntactic structure of a natural language or of a computer language by decomposition into smaller units that have an established interrelationship. [SEMATECH]
particle n		:1 : a minute quantity of solid or liquid matter. [SEMATECH] Also see dirt. 2 : in the manufacture of photolithographic pellicles, material that can be distinguished from the film, whether on the film surface or embedded in the film. [SEMI P5-94] 3 : the replating step in which a catalytic material, often a palladium or gold compound, is absorbed on a surface to act as sites for initial stages of deposition. [ASTM B374-93]
particle beam n		a concentrated, nearly unidirectional flow of particles. [SEMATECH]
particles per wafer pass (PWP) n		the average number of particles added to a wafer as it passes through a tool, expressed in particles per wafer pass or in particles/cm2/pass. [SEMATECH]
particulate		1 n : discrete particle of dirt or other material. [ASTM F1241] Also see dirt. 2 n (dust) : discrete particle of material that can usually be removed by (nonetching) cleaning. [SEMI M10-89] 3 adj : describes material in small, discrete pieces; anything that is not a fiber and has an aspect ratio of less than 3 to 1. Examples are dusts, fumes, smokes, mists, and fogs. [SEMATECH]
particulate contamination n		on a semiconductor wafer, a particle or particles on the surface of the wafer. [ASTM F1241]
parting line protrusions or intrusions n		in the manufacture of plastic semiconductor packages, the plastic excesses or losses that exist at the parting line between the top and bottom cavities after normal molding, deflashing, trimming, and singulation processing. [SEMI G54-93] Also see protrusion.
partition coefficient n		the quotient of the solubility of a compound in octanol and its solubility in water. [SEMATECH]
partitioning n		dividing a system into suitable subsystems so that either the design or physical layout of the system can be realized. [1994 National Technology Roadmap for Semiconductors]
pascal n		the pressure or stress of one newton per square meter, equal to 1.000 X bar or 0.100 dynes per square meter. [SEMATECH]
passivation n		deposition of a scratch-resistant material, such as silicon nitride and/or silicon dioxide, to prevent deterioration of electronic properties caused by water, ions, and other external contaminants. The final deposition layer in processing. [SEMATECH] Also called overcoat and cap deposition.
passive data collection (PDC) n		an activity in which the performance of a process or piece of equipment is sampled while it is running in normal production mode. This activity is used to evaluate normal production mode. This activity is used to emulate normal production without making tweaks or adjustments to the process beyond those normally made during production. [SEMATECH]
passive devices n		semiconductor devices that have passive function, such as capacitors and resistors. [SEMATECH] Contrast active devices.
passive equipment n		equipment that is loaded or unloaded by the active equipment. [SEMI E23-91] Contrast active equipment.
passive transfer n		in automated material movement, a transfer that involves one active and one passive partner. During a passive transfer, the active partner retains control of the transfer envelope during the entire physical transfer. [SEMI E32-94]
passive transfer partner n		in automated material movement, a transfer partner that takes no part in the physical micro level transfer, moving nothing within the transfer envelope. NOTE-This term refers to the physical micro level transfer phase only. Setup activities prior to the transfer may be performed by a passive transfer partner; for example, a port door may be opened during setup phase. [Adapted from SEMI E32-94] Contrast with active transfer partner.
pattern deformation n		in dielectrically isolated (DI) wafers, a microscopic defect associated with missing or indented tub features of 4 microns or more. [SEMI M22-92]
pattern dimension precision and accuracy n		critical dimension (CD) variation and deviation of written pattern from designed value. [SEMI P21-92]
pattern distortion ratio n		in silicon wafers, the absolute magnitude of the quotient of (1) the difference between the width of the pattern on the substrate and the width of the pattern on the top surface of the epitaxial layer, and (2) the thickness of the epitaxial layer. [SEMI M18-94]
pattern, functional n		all of a class of images required for a specific fabrication step that employs a resist coating. In a typical base-oxide removal step for an integrated circuit, includes all base windows, resistor windows, anode windows, base test patterns, and alignment marks that appear on the integrated circuit layout. [ASTM F127-84]
patterning n		the process of photolithography; formation of geometrical shapes by the use of photosensitive resists, masks, and etching techniques. [SEMATECH]
pattern shift ratio n		in silicon wafers, the lateral distance between the center point of the pattern on the surface of the substrate and the center point of the pattern on the surface of the epitaxial layer, divided by the epitaxial layer thickness. [SEMI M18-94]
pattern step height n		in silicon wafers, the difference in vertical position of the diffused (buried layer) surface and the original substrate surface, after removal of oxide. [SEMI M18-94]
pattern stitching accuracy n		position errors at the stitching boundary of writing fields, stripes, and shots. [SEMI P21-92]
pattern surface n		in flat panel display, that surface of a substrate that has, or will have, patterns applied. [SEMI D4-94]
pattern, test n		an image that appears on a photomask for registration or evaluation. [ASTM F127-84]
PBET		see performance-based equipment training.
PCB or PC board		see printed circuit board.
PDC		see passive data collection.
PDSA		see peroxydisulfuric acid.
Pearson distribution n		the probability distribution of a random variable with density function , where B represents the beta function, and are positive real numbers, and 0<<1. Also called Pearson Type 1 distribution and beta distribution. [SEMATECH]
PEB		see post-exposure bake.
PECVD		see plasma-enhanced chemical vapor deposition.
pedestal n		a support pillar axially symmetric to the wafer transport position in a process or cassette module. [SEMI E22-91]
peeling n		any separation of a plated, vacuum deposited, or clad metal layer from the base metal of a leadframe, lead, pin, heatsink, or seal ring, from an underplate, or from a refractory metal on a ceramic package. Peeling exposes the underlying material. [SEMI G61-94] Also called flaking. Contrast blister metal.
pellicle n		a thin, optically transparent film, typically of nitrocellulose, attached to and supported by a frame, and attached to a photomask (or photomask reticle). Its purpose is to seal out contaminants and reduce printed defects caused by contamination in the image plane of an optical exposure system. [SEMI P5-94]
percent perfect beads n		in an ion-exchange resin, the number of perfect beads per 100 total beads. [SEMATECH]
perfect bead n		in an ion-exchange resin, an uncracked, spherical bead that exhibits a whole appearance and that shows no signs of fragmentation when viewed at 20X magnification. [SEMATECH]
performance-based equipment training (PBET, P-BET) n		a training technique developed by SEMATECH to help improve effectives of equipment training and to reduce instructional development time. PBET is based on front-end analysis to ensure that qualified participants are able to reach mastery of job skills as described in clearly stated and measurable learning objectives. [SEMATECH]
performance objective n		a statement in education and training that defines the type of performance, condition, and standard (criterion) of an intended instructional activity, whether it be in a course or a single unit of instruction. [SEMATECH]
periodicity		see pitch.
peripheral chip n		1 : crystallographic damage along the circumference of a wafer. [SEMATECH] 2 : on a wafer surface, shallow crater formed in the periphery of the specimen through conchoidal fracture and resultant spalling. [ASTM F1241] Also called flake chip or surface chip.
peripheral indent n		localized deviation from an otherwise smooth peripheral profile that shows no sign of conchoidal fracture. [ASTM F1241]
permeability, film		see film permeability.
permeation leak n		in the measurement of mass flow controller leak rates, a leak caused by the movement of helium through gaskets, O-rings, polymers, or other materials through which helium can diffuse. [Adapted from SEMI E16-90] Also called diffusion leak.
permissible exposure limit (PEL) n		1 : a time-weighted average exposure limit (typically 8 hours) or a ceiling exposure limit for employees to any material listed in Occupational Safety and Health Administration (OSHA) Regulation 29 CFR, Air Contaminants. [SEMATECH] 2 : the maximum permitted eight-hour time-weighted average concentration of an airborne contaminant. The maximum permitted time-weighted average exposures to be used are those published in 29 CFR 1910, Subpart Z. [SEMI S2-93]
peroxydisulfuric acid (PDSA) n		a chemical used with sulfuric acid to clean wafers. When the two chemicals are combined, they become an aggressive cleaning solution referred to as "piranha." PDSA is classified as an ultrapure oxidant. NOTE-Other oxidants used instead of PDSA to create a piranha solution are hydrogen peroxide and ozone. [SEMATECH]
PERT chart n		a graphic tool used as part of the program evaluation review technique (PERT) to show interdependencies and critical path of a project and to display project status. [SEMATECH]
Petri net n		an abstract model of information handling that shows static and dynamic properties of a system; usually represented as a graph with two vertices called places and transitions, and connected by edges. Markers, called tokens, indicate the dynamic behavior of the network. [SEMATECH]
PGA		see pin grid array.
pH n		the value, ranging from 0 to 14, that represents the acidity or alkalinity of an aqueous solution. Values less than 7 are acidic, and those greater than 7 are alkaline. [SEMATECH]
phase shifting mask (PSM) n		a mask that uses regions of shifted phase to improve stepper imaging performance. Resolution is improved to some extent, but it is generally viewed as a technique for improving depth of focus. [SEMATECH] Also called phase shift mask.
phosphine (PH3) n		a highly toxic, flammable, and colorless gas with the odor of decaying fish. In high concentrations, it is pyrophoric (capable of igniting spontaneously when exposed to air). Phosphine is used for the n-type doping of epitaxial and silicon dioxide films and for ion implantation. It also is used in the production of gallium arsenide phosphide films used to fabricate light-emitting diodes and as a phosphorus source for applications of both chemical deposition and ion implantation. [SEMI C3.6-88]
phosphoric acid (H3PO4) n		1 : an oxygen acid of phosphorus, in the form of an aqueous solution. [SEMATECH] 2 : a heavy and viscous acid used in many etch formulations, particularly those for silicon nitride and beryllium. [SEMATECH]
phosphorus (P) n		a poisonous, nonmetallic chemical element that is self-igniting in air. Phosphorus is the n-type dopant commonly used for some diffusions in standard bipolar integrated circuits. [SEMATECH]
phosphorus oxychloride (POCl3) n		a poisonous, fuming, colorless liquid with a pungent aroma, used as a source of phosphorus for the doping of silicon. [SEMATECH]
photocoupled interface n		a parallel input/output interface connected without contact by means of a photocoupled device. [SEMI E23-91]
photo lifting		see resist lifting.
photolithography		see lithography.
photomask n		a structure comprising functional pattern images produced on a film, plastic, or glass-based material and accurately positioned so as to be useful for selective exposure of a photoresist coating. [ASTM F127-84] Contrast mask.
photomask, defect		see defect, photomask.
photomask, negative n		a photomask having an opaque background and transparent images. [ASTM F127-84]
photomask, positive n		a photomask having transparent background and opaque images. [ASTM F127-84]
photomask, reverse polarity n		a photomask that maintains the same geometric orientation of the array on its surface as that of a referenced photomask, but is of the opposite polarity, as a correct positive mask to a correct negative mask. A correct negative mask is a reverse polarity mask of a correct positive mask. [ASTM F127-84]
photomasking n		1 : an operation in which patterns or images are produced on a glass plate to create a mask. [SEMATECH] 2 : the practice of photolithography. [SEMATECH] 3 : the name of an area or a group that performs photolithography. [SEMATECH]
photophobia n		abnormal sensitivity to light, especially by the eyes. [SEMATECH]
photoplate n		a transparent substrate that has an unpatterned opaque coating used for making photomasks or reticles. [ASTM F127-84]
photoresist (PR) n		a radiation-sensitive material that, when properly applied to a variety of substrates and then properly exposed and developed, masks portions of the substrate with a high degree of integrity. [ASTM F127-84] Also see resist.
photoresist lifting		see resist lifting.
physical interlock n		mechanical connection through which interlock conditions are verified. [SEMATECH]
physical vapor deposition (PVD) n		a process whereby films of material, usually metals, are deposited by physical means, for example, evaporation and sputtering. [SEMATECH]

Back to index…