3D Interconnects—Through Silicon Vias (TSVs)

TSVUsing deep through-silicon vias (TSVs) to electrically connect a stack of chips, 3D interconnect technology bonds semiconductor wafers and die to produce multilevel chips with an optimum combination of cost, functionality, performance and power consumption. When proven feasible for volume manufacturing, 3D will provide a path toward integrating diverse CMOS technologies to each other, as well as CMOS chips with emerging technologies such as MEMS and bio-chips in a cost-effective manner.

SEMATECH's 3D Program is the follow-on to almost ten years of work SEMATECH has undertaken to develop robust copper/low-k interconnect technology.  As these classical CMOS solutions are now being actively implemented in our member fabs, we have moved on to the next-generation interconnect solution —TSVs.

The advantages of 3D-TSV over the alternatives

TSV ComparisonBy combining the performance and power of system-on-chip (SOC) with the functionality and time-to-market advantages of system-in-package (SiP), TSV offers the best of both for achieving very high densities for memory and logic. Its advantages over SoC and SiP include:

  • Greater density for the same footprint
  • More functionality
  • Higher performance
  • Lower power consumption
  • Lower cost
  • More manufacturing flexibility
  • Faster time to market

The right partners delivering the right solution

SEMATECH's ability to bring together the right partners from across the entire industry—chipmakers, equipment and materials suppliers, assembly and packaging service companies—is crucial to making 3D-TSV the right solution for high-volume manufacturing. Furthermore, by using strengths developed over our 20-year history in organization, technology assessment and benchmarking, we have built our program to solve the challenges of 3D-TSV by:

  • Driving industry consensus on integration approaches, process architectures, and tool sets
  • Increasing knowledge of process flow costs and product dependencies
  • Developing mature specific unit processes
  • Creating a roadmap and driving for standards

Given SEMATECH’s successful track record of preparing new technologies for manufacturing—including 300 mm wafers, 193 nm immersion, high-k and low-k materials)—3D Program members will have a clear advantage in overcoming these challenges and accessing the advantages of 3D-TSV.

In sum, being a member of SEMATECH’s 3D Program will:

  • Reduce cost and risk for members
  • Provide members with early access to this breakthrough technology
  • Allow members to formulate and drive standards
  • Give members cost-effective, manufacturable solutions.